digital multi - p hase buck controller chl8316 october 12 , 2011 | final | v1.0 2 1 features ? intel vr11.x compliant digital pwm controller ? programmable 1 - phase to 6 - phase operation ? customized digital over - clocking features an easy - to - use smbus gamer command and a gamer vid control up to 2.3v, gamer vmax, vid override or track, digital load - line adjus t, gamer oc/ovp, gamer off pin and gamer otp ? ir efficiency shaping features a variable gate drive and dynamic phase control ? 1 - phase to 2 - phase psi for light loads ? adaptive transient algorithm minimizes capacitors ? enables thermal phase balancing ? smbus fault indicators: ovp, uvp, ocp, otp ? smbus interface for configuring and monitoring; smbus commands include monitoring input current and power ? compatib le with ir atl drivers and tri - state drivers ? 9 bytes of nvm storage available for customer use ? +3.3v supply voltage; 0oc to 85oc ambient operation ? rohs compliant, msl level 1 package applications ? intel? vr11.x cpu vrd and vrm; ddr memory ? high performance desktops, servers and graphics cards ? over - clocking and high - efficiency application basic application figure 1: chl 8316 basic application circuit descriptio n the chl8316 is a 6 - phase digital synchronous buck controller for core regulation of high - performance intel? vr11.1 and vr11.0 platforms. the chl8316 is fully compliant with vr11.1 including power status indicator (psi) and for improved light load efficiency and accur ate current output (imon). the chl8316 includes a customized set of digital over - clocking features which require no external components. gaming applications can use the smbus interface to place the vrd into gamer mode to extend vid up to 2.3v with 6.25 m v resolution. the chl8316 deploys a number of efficiency shaping features such as variable mosfet gate drive versus load, programmable psi modes for optimum light - load along with programmable phase shedding to autonomously add/drop phases versus load. chl8 316 supports ntc temperature sense to report temperature and trigger vr hot and otp faults. digital thermal balancing allows proportional current imbalance between phases. the chl8316 provides extensive ovp, uvp, ocp, and otp fault protection. device and fault configuration parameters are easily defined using the ir power designer gui and stored in on - chip non - volatile memory (nvm). the 3 - pin smbus interface can be used to monitor a variety of operating parameters on up to seven chl8316 based vrs. the con troller includes a unique sensorless and lossless input current monitoring capability . pin diagram figure 2 : chl 8316 package top view chl8316 s d a p w m 5 i s e n 6 e n v r t n r c s m p s i # i s e n 5 i s e n 4 i s e n 3 p w m 6 v i d 0 v i d 1 v i d 2 v i d 3 v i d 4 v i d 5 v i d 6 v i d 7 v c p u v c c s c l p w m 4 i m o n v r _ r e a d y i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t p w m 3 v i n s e n s a l e r t # v 1 8 a r r e s n c v c c 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 4 8 4 7 4 6 4 5 2 4 2 5 2 6 2 7 2 8 1 7 1 8 1 9 2 0 2 1 2 2 2 3 4 0 3 9 3 8 3 7 3 6 3 5 4 1 4 2 i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 v a r _ g a t e 1 5 1 6 4 4 4 3 v c c 3 3 3 2 3 1 3 0 2 9 3 4 g n d s a d d r / g a m e r _ o f f c h l 8 3 1 6 t o p v i e w 4 8 p i n 7 m m x 7 m m q f n
digital multi - p hase buck controller chl8316 october 12 , 2011 | final | v1.0 2 2 ordering information chl 8316 - ? ? ? ? ? package tape & reel qty part number qfn 3000 chl 8316 crt qfn 3000 chl 8316 - xx crt 1 notes: 1 . xx indicates c ustomer s pecific c onfiguration f ile . figure 3: chl 8316 top view enlarged t C tape and reel r C package type (dfn) c C operating temperature (commercial standard) xx - configuration file id s d a p w m 5 i s e n 6 e n v r t n r c s m p s i # i s e n 5 i s e n 4 i s e n 3 p w m 6 v i d 0 v i d 1 v i d 2 v i d 3 v i d 4 v i d 5 v i d 6 v i d 7 v c p u v c c s c l p w m 4 i m o n v r _ r e a d y i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t p w m 3 v i n s e n s a l e r t # v 1 8 a r r e s n c v c c 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 4 8 4 7 4 6 4 5 2 4 2 5 2 6 2 7 2 8 1 7 1 8 1 9 2 0 2 1 2 2 2 3 4 0 3 9 3 8 3 7 3 6 3 5 4 1 4 2 i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 v a r _ g a t e 1 5 1 6 4 4 4 3 v c c 3 3 3 2 3 1 3 0 2 9 3 4 g n d s a d d r / g a m e r _ o f f c h l 8 3 1 6 t o p v i e w 4 8 p i n 7 m m x 7 m m q f n
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